A semiconductor nonvolatile storage element in which data is electrically rewriteable and which is called as an EEPROM has many types and comprises typically a MONOS memory, a MNOS memory and a floating gate memory.
The MONOS memory is a semiconductor nonvolatile storage element having the structure of Metal-Oxide-Nitride-Oxide-Semiconductor in a cross section while the MNOS memory is a semiconductor nonvolatile storage element having the structure of Metal-Nitride-Oxide-Semiconductor in a cross section.
The MONOS memory is the nonvolatile storage element which realizes a high reliability and a thin film by subjecting the memory nitride film of a prior art MONOS memory to the thermal oxidation for thereby forming the oxide film on the memory nitride film. The oxide film layered on the memory nitride film is normally called a "top oxide film" while the oxide film layered under the memory nitride film is called a "tunnel oxide film".
The MONOS memory has lately attracted considerable attention because it has a high reliability and data is rewriteable therein many times.
The MONOS memory comprises, for example, as shown in FIG. 2, a semiconductor substrate 1, a tunnel oxide film 3, a memory nitride film 5, a top oxide film 7 and a memory gate electrode film 9. In the prior art MONOS memory, the top oxide film 7, memory nitride film 5, the tunnel oxide film 3 and the memory gate electrode film 9 are formed of respectively the same patterns having the same sizes at least within the storage element region.
FIG. 2 is a cross-sectional view showing the arrangement of a semiconductor device on which the prior art MONOS memory is mounted wherein only the gate of the MONOS memory within the storage element region and the portion adjoining thereto and the gate of the MOS transistor constituting a peripheral circuit are shown and the portion adjoining thereto but the illustration of the interconnections with metallizations is omitted.
With reference to FIG. 2 describing the structure of the MONOS memory in detail, there are formed the tunnel oxide film 3, the memory nitride film 5, the top oxide film 7 and the memory gate electrode film 9 which are sequentially layered in this order and have the same pattern sizes within the storage element region on the surface of the semiconductor substrate 1.
A gate oxide film 11 of the MOS transistor constituting the peripheral circuit is formed on the surface of the semiconductor substrate 1 outside the storage element region and a gate electrode film 13 of the MOS transistor is formed on the gate oxide film 11.
The memory gate electrode film 9 and the gate electrode film 13 of the MOS transistor can be formed in the same step or in different steps. The memory gate electrode film 9 and the gate electrode film 13 of the MOS transistor are generally formed in the same step so as to not impede the MOS transistor characteristics of the peripheral circuit.
That is, such a semiconductor nonvolatile storage element is normally fabricated as a semiconductor device which is integrated with the peripheral circuit to form a chip.
In case of fabricating the nonvolatile storage element as the semiconductor device, there is a case to lay stress on the nonvolatile memory characteristics such as a rewriteable speed or a data holding characteristics or a case to lay stress on the peripheral circuit characteristics.
The nonvolatile memory characteristics is laid on stress in case that a general purpose memory and the peripheral circuit comprise mostly a digital circuit while the peripheral circuit characteristics is laid on stress in case the peripheral circuit is provided with an analog circuit.
In case of the digital circuit, even if the transistor characteristics constituting the digital circuit is deteriorated to some extent, it does not impede the operation of the digital circuit. However, in case of the analog circuit, the deterioration of the transistor characteristics which is caused by mounting the nonvolatile memory at the same time is not permitted since the analog circuit utilizes the transistor characteristics per se in many cases.
Accordingly, the fabrication of the semiconductor device is difficult in case of laying stress on the peripheral circuit characteristics.
To solve the difficulties as set forth above, many devices have been conventionally performed in the fabricating method, for example, there is a method relative to the MONOS memory as disclosed in Japanese Laid-Open Patent Publication No. 60-60770.
An example of the prior art method of fabricating a typical semiconductor device on which the MONOS memory is mounted is described with reference to FIGS. 34 to 43.
FIGS. 34 to 43 are typical cross-sectional views showing the steps ranging from the step following the formation of the element isolation region to the step to form the gate electrode wherein the illustration of steps before and after these steps is omitted.
First, as shown in FIG. 34, the surface of a silicon substrate 1 as the semiconductor substrate is subjected to the thermal oxidation to thereby form a sacrificial oxide film 2.
Secondly, as shown in FIG. 35, the sacrificial oxide film 2 is selectively removed using a resist 4 to thereby expose a part of the surface of the silicon substrate 1 within a storage element forming region 31.
After the removal of the resist 4, the exposed silicon substrate 1 is subjected to the thermal oxidation to thereby form a tunnel oxide film 3.
Then as shown in FIG. 37, a memory nitride film 5 is formed on the tunnel oxide film 3 and the oxide film of the sacrificial oxide film 2.
Further, as shown in FIG. 38, the memory nitride film 5 is subjected to the thermal oxidation to thereby form a top oxide film 7.
Next, as shown in FIG. 39, the top oxide film 7 and the memory nitride film 5 and the tunnel oxide film 3 are selectively removed using the resist 4.
Successively, as shown in FIG. 40, the sacrificial oxide film 2 is removed and thereafter as shown in FIG. 41, the resist 4 is removed and the silicon substrate 1 is subjected to the thermal oxidation to thereby form a gate oxide film (insulator film) 11 for the peripheral circuit.
Next, as shown in FIG. 42, a gate electrode film member 15 comprising a polycrystalline silicon is formed on these films.
Then, as shown in FIG. 43, the gate electrode film member 15 is selectively removed using the resist 4 to thereby form the memory gate electrode film 9 and the gate electrode film 13 of the MOS transistor.
If the resist 4 is removed thereafter, the semiconductor device is formed in the same structure as that as shown in FIG. 2. It is enough to take the same subsequent steps as those in the method of fabricating the semiconductor device on which the nonvolatile memory is not mounted.
Such a prior art semiconductor nonvolatile storage element mounted on the semiconductor device (MONOS memory in this example) is not fabricated in its self-alignment as evident from FIGS. 2 and 43 although the memory gate electrode film 9 and the film constituting the lower layer within the element forming region, namely, the top oxide film 7, the memory nitride film 5 and the tunnel oxide film 3 have respectively the same pattern sizes.
Accordingly, there is a possibility that the memory gate electrode film 9 is formed slightly dislocated from the film constituting the lower layer. That is, if the memory gate electrode film 9 is formed at the position which is slightly dislocated, a part of the memory gate electrode film 9 is formed on the gate oxide film 11.
In such a case, the same structure as the MOS transistor constituting the peripheral circuit is formed in either side of the source or the drain of the MONOS memory. Accordingly, there was a problem that the read operation of the MONOS memory was uncertain since the memory gate electrode film 9 which was slightly dislocated and the region of the gate oxide film 11 of the MOS transistor formed an offset gate.
It is a first object of the invention to solve this problem and to provide a semiconductor nonvolatile storage element of the MONOS structure and a method of fabricating the same which can perform the read operation with assurance.
The prior art method of fabricating the semiconductor device as explained with reference to FIGS. 34 to 43 is the one which laid stress on the transistor characteristics of the peripheral circuit and is very excellent since it can obtain the quite same peripheral circuit characteristics or performance in case that the nonvolatile memory is not mounted.
However, the consideration to the nonvolatile memory is not sufficient. As a result, there is a disadvantage that an erasing operation takes long time.
It is known that the method of subjecting the tunnel oxide film to the thermal nitriding is effective to speed up the erasing operation without deteriorating the data holding characteristics and this method for the MONOS is described for example in Japanese Laid-Open Patent Publication No. 60-55669.
However, the thermal nitriding process exerts a serious influence upon the transistor characteristics of the peripheral circuit. Accordingly, if the peripheral circuit includes an analog circuit, the nonvolatile memory characteristics is not improved by subjecting the tunnel oxide film to the thermal nitriding.
It is a second object of the invention to provide a method of fabricating the semiconductor device which can solve the aforementioned problems, can subject the tunnel oxide film to the thermal nitriding without exerting an influence upon the transistor characteristic of the peripheral circuit, can improve the nonvolatile memory characteristics and can speed up the erasing operation.
Another example of the arrangement of the prior art semiconductor nonvolatile storage element will be described with reference to the cross-sectional view of FIG. 45. FIG. 45 is typical cross-sectional view of the memory transistor taken along a channel width direction.
The memory transistor constituting the semiconductor nonvolatile storage element comprises storage element regions 22 composed of a tunnel oxide film 24, a silicon nitride film 25, a top oxide film 26 and a memory gate electrode 27 which are sequentially formed on a semiconductor substrate 23 and field regions 21 composed of field oxide films 28, the tunnel oxide film 24, the silicon nitride film 25, the top oxide film 26 and the memory gate electrode 27.
A method of fabricating this semiconductor nonvolatile storage element will be described with reference to FIGS. 44 and 45 showing typical cross-sectional views.
As shown in FIG. 44, the field oxide films 28 each having thick thickness are formed on the first conductive type semiconductor substrate 23 within field regions 21 around storage element regions 22 using a selective oxidation method.
Thereafter, a sacrificial oxide film 29 is formed on the entire surface and a shielding silicon nitride film 30 is formed on the sacrificial oxide film 29 and thereafter a region for forming the memory gate electrode 27 is formed using a photo-etching technique, namely, by removing the shielding silicon nitride film 30 and the sacrificial oxide film 29 within all the regions in FIG. 44.
With such an arrangement, there remain the sacrificial oxide film 29 and the shielding silicon nitride film 30 on the region where the memory gate electrode 27 is not formed.
Thereafter, as shown in FIG. 45, a silicon dioxide film is formed on the entire surfaces for forming the tunnel oxide film 24 and the tunnel oxide film 24 is subjected to the thermal nitriding in the atmosphere including ammonia gas to thereby form the nitride oxide film.
The silicon nitride film 25 and the top oxide film 26 are formed on the tunnel oxide film 24 formed of the nitride oxide film and a polycrystalline silicon film forming the memory gate electrode 27 is further formed on the top oxide film 26.
The polycrystalline silicon film, the top oxide film 26, the silicon nitride film 25 and the tunnel oxide film 24 are respectively etched using the photo-etching technique to thereby form the memory gate electrode 27.
Thereafter, a second conductive source region and a drain region are formed on the semiconductor substrate 23 on the region where the memory gate electrode 27 is aligned, not shown, whereby the semiconductor nonvolatile storage element is formed.
In the memory transistor of the semiconductor nonvolatile storage element which is fabricated by the aforementioned method, each of the field regions 21 is composed of the field oxide films 28 alone in the step to form the tunnel oxide film 24 and subject the tunnel oxide film 24 to the thermal nitriding in the atmosphere including the ammonia gas.
Accordingly, there is the following reaction between the tunnel oxide film 24 and the field oxide film 28. EQU 3SiO.sub.2 +4NH.sub.3 .fwdarw.Si.sub.3 N.sub.4 +6H.sub.2 O
Whereupon, the oxide film is dissociated by the action of hydrogen which is generated by the decomposition of ammonia to thereby generate non-bonded silicon ions so that the positive charges on the insulator film increase in the field oxide film 28.
Therefore, if the memory element is formed of an N-channel, the threshold voltage of the parasitic MOS transistor formed by the field oxide films 28 for isolating the memory elements is lowered by the positive charges on the insulator film so that a leakage current generates between the memory elements which causes the inferior data.
To solve the problem as set forth immediately before, it is a third object of the invention to provide a semiconductor nonvolatile storage element and a method of fabricating the same which can reduce the leakage current between the storage elements by the lowering of the threshold voltage of the parasitic MOS transistor within the field region so that the read operation can be performed with safety in the memory characteristics.